In many types of circuits it is desirable to cancel the effects of parasitic nonlinear capacitances when sampling and level shifting differential voltages. Examples of such circuits are analog to digital converters (ADCs) and digital signal processors. In a circuit which has a 2.5 differential voltage, a sampling capacitor of 20 picoFarads is employed to suppress the effect of the non-linear capacitances. This large capacitance can significantly affect the cost of an integrated circuit as well as significantly add to the area of the circuitry.
Accordingly, what is needed is a system and method for providing sampling and level shifting circuitry which does not require large capacitances and therefore is less costly and utilizes less area in an integrated circuit. The circuitry, system and method should be easily implemented, adaptable and cost effective The present invention addresses such a need.